1. Field of the Invention
The present invention generally relates to an inverter chopper type balance/unbalance-mode voltage comparing circuit and also a voltage comparing method. More specifically, the present invention is directed to a chopper type voltage comparing circuit with employment of an inverter, capable of periodically, correctly determining a polarity of a comparison output based upon a comparison result of input voltages, and further to a voltage comparing method.
2. Description of the Related Art
Chopper type voltage comparing circuits are useful in highspeed analog-to-digital (A/D) converters and the like. Conventionally, one typical chopper type voltage comparing circuit is known from, for example, Japanese Patent Laid-open Application No. Sho61-200715 published in 1986. That is, in this conventional chopper type voltage comparing circuit, two sets of inverters are connected via the capacitor in the forward feedback manner, so that the voltage comparison can be carried out while maintaining a small offset value and a high sensitivity.
FIG. 9 is a circuit diagram for indicating an electronic circuit arrangement of one conventional voltage comparing circuit. FIG. 10 is a diagram for representing operation timing in this conventional voltage comparing circuit. FIG. 11 graphically shows a transfer characteristic of an inverter.
As indicated in FIG. 9, the conventional voltage comparing circuit is mainly arranged by a switch 101, another switch 102, another switch 103, another switch 104, another switch 105, another switch 106, another switch 107, another switch 108, a capacitor 110, another capacitor 111, an inverter 112, another inverter 113, another capacitor 114, another capacitor 115, a current source circuit 116, another current source circuit 117, another current source circuit 118, and a further current source circuit 119.
In this conventional voltage comparing circuit, the switch 101 is turned ON/OFF between a plus-sided voltage V.sub.I+ of an analog input signal and one terminal of the capacitor 110. The switch 102 is turned ON/OFF between a minus-sided voltage V.sub.I- of the analog input signal and one terminal of the capacitor 111. The switch 103 is turned ON/OFF between a plus-sided voltage V.sub.R+ of a reference voltage and one terminal of the capacitor 110. The switch 104 is turned ON/OFF between a minus-sided voltage V.sub.R- of the reference voltage and one terminal of the capacitor 111. The switch 105 is turned ON/OFF between an input terminal of the inverter 112 and an output terminal thereof. The switch 106 is turned ON/OFF between an input terminal of the inverter 113 and an output terminal thereof. The switch 107 is turned ON/OFF via the capacitor 115 between an input terminal of the inverter 112 and an output terminal of the inverter 113. The switch 108 is turned ON/OFF via the capacitor 114 between an input terminal of the inverter 113 and an output terminal of the inverter 112. In response to output voltages V.sub.01 and V.sub.02 from the respective inverters 112 and 113, the current source circuits 116 and 117 supply currents from a power supply V.sub.DD to the inverters 111 and 112 so as to apply a high-voltage-sided power supply voltage V.sub.H. Also, in response to the output voltages V.sub.01 and V.sub.02 from the respective inverters 112 and 113, the current source circuits 118 and 119 supply currents from the inverters 112 and 113 to the ground so as to apply a low-voltage-sided power supply voltage V.sub.L.
Referring to FIG. 9 to FIG. 10, voltage comparing operations of this conventional voltage comparing circuit will be explained. As represented in FIG. 10, the voltage comparing operations of the voltage comparing circuit shown in FIG. 9 are subdivided into three modes, namely, a preset mode, an amplifying mode, and a latch mode. The following description is made of these modes in turn:
1). PRESET MODE
In this preset mode, the switches 103, 104, 105, 106, 107, and 108 are turned ON, whereas the switch 101 and the switch 102 are turned OFF. As a result, a difference voltage between the plus-sided voltage V.sub.R+ of the reference voltage and a logical threshold voltage V.sub.LT1 of the inverter 112 is stored into the capacitor 110, whereas another difference voltage between the minus-sided voltage V.sub.R- of the reference voltage and another logical threshold voltage V.sub.LT2 of the inverter 113 is stored into the capacitor 111.
2). AMPLIFYING MODE
In this amplifying mode, the switches 101 and 102 are turned ON, whereas the switches 103, 104, 105, 106, 107, and 108 are turned OFF. As a result, the inverter 112 amplifies a difference voltage between the plus-sided voltage V.sub.I+ of the analog input signal and the plus-sided voltage V.sub.R+ of the reference voltage, whereas the inverter 113 amplifies another difference voltage between the minus-sided voltage V.sub.I- of the analog input signal and the minus-sided voltage VR of the reference voltage.
3). LATCH MODE
In this latch mode, the switches 101, 102, 107, and 108 are turned ON, whereas the switches 103, 104, 105, and 106 are turned OFF. As a result, since the inverters 112 and 113 are forwardfed back via the capacitors 114 and 115, these inverters 112 and 113 may be operated as a flip-flop. Therefore, an unbalance in the output amplitudes of the inverters 112 and 113 is enlarged which is caused by the difference voltage between the plus-sided voltage V.sub.I+ of the analog input signal and the minus-sided voltage V.sub.I- thereof, so that this conventional voltage comparing circuit can judge as to whether or not the plus-sided voltage V.sub.I+ is higher than the minus-sided voltage V.sub.I-. Precisely speaking, finally, in the transfer characteristic between an input voltage V.sub.in of an inverter and an output voltage Vout thereof shown in FIG. 11, the output voltage of one inverter which constitutes the above-described flip-flop is changed to such a value "A" approximated to the power supply voltage VDD, whereas the output voltage of the other inverter which also constitutes the above-described flip-flop is changed to such a value "C" approximated to the ground potential V.sub.E. As a consequence, the voltage comparing circuit can judge as to whether or not the plus-sided voltage V.sub.I+ is higher than the minus-sided voltage V.sub.I-.
It should be noted that a logical threshold voltage represents a voltage at a point B where the input voltage V.sub.in is equal to the output voltage V.sub.out in the transfer characteristic shown in FIG. 11. The respective inverters own the logical threshold voltages specific thereto. Concretely speaking, a logical threshold voltage of an inverter is outputted when an input terminal of this inverter is shortcircuited to an output terminal thereof.
In the conventional voltage comparing circuit of FIG. 9, the current source circuits 116, 117, and 118, 119 may be operated as DC parallel resistors R.sub.tot1 and R.sub.tot2 by supplying currents in response to the output voltage V.sub.01 and V.sub.02 of the inverters 112 and 113 based upon mutual conductances Gm.sub.1 and Gm.sub.2 owned by these current source circuits. The resistance values of these DC parallel resistors R.sub.tot1 and R.sub.tot2 are changed, depending upon an average value (V.sub.01 +V.sub.02)/2 of the output voltages V.sub.01, V.sub.02 of the inverters 112, 113. In this case, these resistance values are changed in a complementary manner. That is, since the average value (V.sub.01 +V.sub.02)/2 is increased, the DC parallel resistor R.sub.tot1 is increased, whereas the DC parallel resistor R.sub.tot2 is decreased. As a consequence, since the average value (V.sub.01 +V.sub.02)/2 of the outputs from the inverters 112 and 113 is increased, namely an average value (V.sub.in1 +V.sub.in2)/2 of the respective input voltages V.sub.in1, V.sub.in2 of the inverters 111, 112 is increased, both the high-voltage-sided power supply voltage V.sub.H and the low-voltage-sided power supply voltage V.sub.L of the inverters 112, 113 are moved along the decrease directions. As a consequence, even when there are in-phase mode inputs, the negative feedback is actuated in such a manner that deviation from the operating point set in the preset mode can be suppressed, so that the in-phase mode suppression effect is established. Similarly, this in-phase mode suppression effect is established in the case that the average value (V.sub.in1 +V.sub.in2)/2 is increased.
As a consequence, in accordance with the conventional voltage comparing circuit of FIG. 9, the comparison operation with high sensitivity can be achieved. A detailed comparison operation of this conventional voltage comparing circuit is described in the above-explained patent application.
However, the above-described conventional voltage comparing circuit owns the following problems. That is, after the difference voltage between the reference voltage and the logical threshold voltage of the inverter has been captured into the respective capacitors 110 and 111 in the preset mode, both the switches 101 and 102 are turned ON in the amplifying mode, so that the difference voltage between the input voltage and the reference voltage is stored into the capacitors 110 and 111, and furthermore, both the switches 105 and 106 are turned OFF to amplify this difference voltage. Then, in the latch mode, the operations of the inverters 112 and 113 are moved to the flip-flop operation. In this case, when the input voltage is varied in response to the noise and the like in a transition time period during which the circuit is initiated as the flip-flop, the state of this flip-flop will be changed in accordance with the variation of the input voltage. As a result, in this case, the timing when the output state as the voltage comparing circuit is determined would be varied.
On the other hand, in the chopper type voltage comparing circuit, it is important that the output state of the comparison result can be determined by correctly sampling the input voltage in a preselected time period. If the timing for determining the output state is varied, then this variation is similar to such a condition that a jitter phenomenon occurs in the sampling period. There is another problem. That is to say, there is a risk that the signal processing precision would be deteriorated.
In the current source circuits 116, 117 and 118, 119 employed in the above-explained conventional voltage comparing circuit, the low-voltage-sided power supply voltage V.sub.L is set substantially equal to the ground potential, and the high-voltage-sided power supply voltage V.sub.H is set substantially equal to the power supply voltage V.sub.DD, and furthermore, the transistors which constitute the respective current source circuits are operated in the unsaturated region (namely, triode region). As a result, even when the output voltages V.sub.01 and V.sub.02 of the inverters 112 and 113 are changed, there are small variations in the resistance values of the DC parallel resistors R.sub.tot1 and R.sub.tot2. Accordingly, no great expectation can be made as to the in-phase mode (common mode) suppression effect achieved by this constant current itself. On the other hand, since such a current source circuit is provided, there is another problem. That is, the power supply voltage utilization rate would be lowered, so that this conventional voltage comparing circuit cannot be operated under low power supply voltages. In addition, the entire circuit scale of this conventional voltage comparing circuit would be increased, so that the area of the circuit board thereof is increased. Also, since these feedback elements (namely, current source circuits 116 to 119) may function as the load with respect to the output terminal, there is a further problem. That is, the comparing operation speed of this conventional voltage comparing circuit would be lowered by approximately 1/2, as compared with that of such a voltage comparing circuit in which these feedback elements are not employed.